10

Bounded delay timing analysis and power estimation using SAT

Year:
2010
Language:
english
File:
PDF, 234 KB
english, 2010
24

SAT based solutions for detailed routing of island style FPGA architectures

Year:
2015
Language:
english
File:
PDF, 496 KB
english, 2015
30

A Sat Based Scheduling Technique for Peak Power Minimization

Year:
2015
Language:
english
File:
PDF, 173 KB
english, 2015
35

Via-Aware Dogleg Routing Using Boolean Satisfiability

Year:
2016
Language:
english
File:
PDF, 306 KB
english, 2016